1 www.pericom.com 12/02/15 block diagram features ? maximum rated frequency: 133 mhz ? low cycle-to-cycle jitter ? input to output delay, less than 200ps ? internal feedback allows outputs to be synchronized to the clock input ? spread spectrum compatible ? operates at 3.3v v dd ? space-saving package: (pb-free & green available) - 16-pin tssop (l) - 16-pin soic (w) description the p i6c2409-1h is a p ll bas ed, zero-delay buf fer, w ith the ability to distribute nine outputs of up to 133 mhz at 3.3v . all the outputs are distributed from a single clock input clkin and output out0 performs zero delay by connecting a feedback to pll. pi6c2409-1h has two banks of four outputs that can be controlled by the selection inputs, sel1 & sel2. it also has a power sparing feature: when input sel1 is 0 and sel2 is 1, pll is turned of f and all outputs are referenced from clkin. pi6c2409-1h is available in high drive and industrial environment versions. an internal feedback on out0 is used to synchronize the outputs to the input; the relationsh ip between loading of this signal and the outputs determines the input-output delay . pi6c2409-1h are characterized for both commercial and industrial operation pin confguration pll clkin sel1 sel2 decode logic outa1 outa2 outa3 outa4 outb2 outb3 outb4 outb1 pi6c2409-1h mux out0 1 2 3 vdd 4 gnd 5 outa2 6 outb2 7 sel1 8 outb1 out0 outa3 v dd outb4 outb3 sel2 16 15 14 13 12 11 10 9 clkin outa1 gnd outa4 16-pin w, l pi6c2409-1h zero-delay clock bufer all trademarks are property of their respective owners. 15-0174
2 input select decoding sel2 sel1 outa [1-4] outb [1-4] output source (out0) pll 0 0 3-state 3-state pll on 0 1 pll 3-state pll on 1 0 clkin clkin clkin off 1 1 pll pll pll on pin signal description 1 clkin input clock reference frequency (weak pull-down) 2, 3, 14, 15 outa[1-4] clock outputs, bank a 4, 13 vdd 3.3v supply 5, 12 gnd ground 6, 7, 10 ,11 outb[1-4] clock outputs, bank b 8 sel2 select input, bit 2 (weak pull-up) 9 sel1 select input, bit 1 (weak pull-up) 16 out0 clock output , internal pll feedback pin description the relationship between loading of the out0 signal and other outputs determines the input-output delay . zero delay is achieved when all outputs, including feedback, are loaded equally. zero-delay and skew control clkin input to outx delay vs. difference in loading between out0 pin and outx pins output load difference: out0 load - outx load (pf) clkin - input to outx delay (ps) 600 800 400 200 0 -200 -400 -600 -800 -900 -1000 -25 -20 -15 -10 -5 0 5 10 15 20 25 pi6c2409-1h pi6c2409-1h zero-delay clock bufer www.pericom.com 1 1/21/ 2015 all trademarks are property of their respective owners. 15-0174
3 operating conditions (v cc = 3.3v 0.3v) parameter description min. max. units v dd supply v oltage 3.0 3.6 v t a commercial operating t emperature 0 70 oc industrial operating t emperature -40 85 c l load capacitance, below 100 mhz 30 pf load capacitance, from 100 mhz to 133 mhz - 15 c in input capacitance - 7 storage temperature .......................................................... C65c to +150c supply voltage to ground potential ................................... C0.5v to +4.6v dc input voltage ........................................................ C0.5v to v dd +0.5v esd protection (input) ................................................. 2000 v min (hbm) note stresses greater than those listed under maxi - mum ratings may cause permanent damage to the device. tis is a stress rating only and functional op - eration of the device at these or any other conditions above those indicated in the operational sections of this specifcation is not implied. exposure to absolute maximum rating conditions for extended periods may afect reliability. maximum ratings (above which useful life may be impaired. for user guidelines, not tested.) dc electrical characteristics for industrial temperature devices parameters description test conditions min. max. units v il input low v oltage 0.8 v v ih input high v oltage 2.0 i il input low current v in = 0v 50.0 a i ih input high current v in = v dd 125 v ol output low v oltage i ol = 12ma 0.4 v v oh output high v oltage i oh = C12ma 2.4 i dd bypass, pll off sel1 = 0, sel2 = 1 1.0 ma supply current unloaded outputs 100 mhz, select inputs at v dd or gnd 62 unloaded outputs 66 mhz, clkin 44 pi6c2409-1h zero-delay clock bufer www.pericom.com 1 1/21/ 2015 all trademarks are property of their respective owners. 15-0174
4 ac electrical characteristics for industrial temperature devices parameters name test conditions min. typ. max. units f o output frequency 30pf load 10.0 100 mhz 10pf load 133 t dc duty cycle (1) measured at v dd /2, f out = 66.67 mhz 40.0 50 60.0 % duty cycle (1) measured at v dd /2v, f out <50mhz 45.0 55.0 t r rise t ime (1) measured between 0.8v and 2.0v 1.5 ns t f fall t ime (1) measured between 0.8v and 2.0v 1.5 t sk(o) output to output skew (1) all outputs equally loaded 250 ps t 0 delay, clkin rising edge to out0 rising edge (1) measured at v dd /2 0 350 t sk(d) device-to-device skew (1) measured at v dd /2 on out0 pins of devices 0 700 t slew output slew rate (1) measured between 0.8v & 2.0v on C1h device using t est crt #2 1 v/ns t jit cycle-to-cycle jitter (1) measured at 66.67 mhz, loaded 30pf load 250 ps t lock pll lock t ime (1) stable power supply, valid clocks presented on clkin pin 1.0 ms note: 1. see switching w aveforms on page 6. dc electrical characteristics for commercial temperature devices parameters description test conditions min. max. units v il input low v oltage - - 0.8 v v ih input high v oltage - 2.0 - i il input low current v in = 0v - 50 a i ih input high current v in = v dd - 125 v ol output low v oltage i ol = 12ma - 0.4 v v oh output high v oltage i oh = C12ma 2.4 - i dd bypass, pll off sel1 = 0 sel2 = 1 - 1.0 ma supply current unloaded outputs, 66.67 mhz, select inputs at v dd or gnd - 39 unloaded outputs 100 mhz select inputs @ v dd or gnd - 54 pi6c2409-1h zero-delay clock bufer www.pericom.com 1 1/21/ 2015 all trademarks are property of their respective owners. 15-0174
5 ac electrical characteristics for commercial temperature devices parameters description test conditions min. typ. max. units f o output frequency 30pf load 10.0 100 mhz 10pf load 133 t dc duty cycle (1) measured at v dd /2, f o = 66.67 mhz 40.0 50 60.0 % duty cycle (1) measured at v dd /2v, f o <50 mhz 45.0 55.0 t r rise t ime (1) measured between 0.8v and 2.0v 1.5 ns t f fall t ime (1) 1.5 t sk(o) output to output skew (1) all outputs equally loaded 250 ps t 0 delay, clkin rising edge to out0 rising edge (1) measured at v dd /2 0 350 t sk(d) device-to-device skew (1) measured at v dd /2 on out0 pins of devices 0 700 t slew output slew rate (1) measured between 0.8v & 2.0v on C1h device using t est crt #2 1 v/ns t jit cycle-to-cycle jitter (1) measured at 66.67 mhz, loaded 30pf load 200 ps t lock pll lock t ime (1) stable power supply, valid clocks presented on clkin pin 1.0 ms note: 1. see switching w aveforms on page 6. pi6c2409-1h zero-delay clock bufer www.pericom.com 1 1/21/ 2015 all trademarks are property of their respective owners. 15-0174
6 switching waveforms t low t high v dd /2 v dd /2 v dd /2 t f t r 0.8v 2.0v 0.8v 2.0v output 0v 3.3v v dd /2 v dd /2 v dd /2 v dd /2 v dd /2 v dd /2 t sk(o) output output t 0 input output t sk(d) output device 1 output device 2 duty cycle timing all outputs rise/fall time output-output skew input-output propagation delay device-device skew t dc = t high t high+ t low v dd c load v dd gnd gnd clk out outputs 0.1f 0.1f v dd 10pf v dd gnd gnd clk out outputs 0.1f 0.1f 1k-ohm 1k-ohm pi6c2409-1h zero-delay clock bufer www.pericom.com 1 1/21/ 2015 all trademarks are property of their respective owners. 15-0174
7 packaging mechanical: 16-pin tssop (l) date: 05/03/12 description: 16-pin, 173mil wide tssop package code: l document control #: pd-1310 revision: f notes: 1. refer jedec mo-153f/ab 2. controlling dimensions in millimeters 3. package outline exclusive of mold flash and metal burr 12-0372 pi6c2409-1h zero-delay clock bufer www.pericom.com 1 1/21/ 2015 all trademarks are property of their respective owners. 15-0174
8 packaging mechanical: 16-pin soic (w) description: 16-pin, 150mil wide soic package code: w document control #: revision: f date: 06 /15/12 date: 06 /15/12 pd-1004 2012-0398 ordering information ordering code package code package description operating range pi6c2409-1hle l 16-pin, 173-mil w ide (tssop) commercial pi6c2409-1hlex l 16-pin, 173-mil w ide (tssop), t ape & reel commercial pi6c2409-1hlie l 16-pin, 173-mil w ide (tssop) industrial pi6c2409-1hliex l 16-pin, 173-mil w ide (tssop), t ape & reel industrial pi6c2409-1hwe w 16-pin, 150-mil w ide (soic) commercial pi6c2409-1hwex w 16-pin, 150-mil w ide (soic), t ape & reel commercial pi6c2409-1hwie w 16-pin, 150-mil w ide (soic) industrial PI6C2409-1HWIEX w 16-pin, 150-mil w ide (soic), t ape & reel industrial notes: 1. thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. e = pb-free and green 3. adding an x suffx = t ape/reel pericom semiconductor corporation ? 1-800-435-2336 pi6c2409-1h zero-delay clock bufer www.pericom.com 1 1/21/ 2015 all trademarks are property of their respective owners. 15-0174
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